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来自 RISC-V 专家的最新洞察与深度技术解析

SiFive 博客是您获取 RISC-V 最新动态的首选平台,内容涵盖处理器 IP、芯片架构、软件开发及各类技术创新。无论您正在打造下一代消费电子产品、优化数据中心,还是开发新一代汽车,都欢迎关注並获取专家们的最新见解。

The RISC-V Revolution is Going Strong in Ahmedabad

The RISC-V Revolution is Going Strong in Ahmedabad

Mar 04, 2020
As part of our ongoing effort to spread knowledge about the RISC-V ISA around the globe, we hosted a two-day long RISC-V Symposium/Workshop in the ancient city of Ahmedabad, India. The event was co-hosted by Nirma University at their campus at Ahmedabad. The first day of the event was the symposium ...
Our SiFive Tech Symposiums in Costa Rica and Mexico Underscore the Global Adoption of the RISC-V ISA in Industry and Academia

Our SiFive Tech Symposiums in Costa Rica and Mexico Underscore the Global Adoption of the RISC-V ISA in Industry and Academia

Feb 29, 2020
Our SiFive Tech Symposiums in San José, Costa Rica and Mexico City, Mexico were well attended by not only those in industry, but in academia as well. There is a great deal of enthusiasm and engagement in RISC-V in both of these regions. Many new friendships were formed, and we look forward to the co...
Part 4: High-Performance Interconnect for Accelerators: Enabling Optimized Data Transfers with RISC-V

Part 4: High-Performance Interconnect for Accelerators: Enabling Optimized Data Transfers with RISC-V

Feb 24, 2020
This is the fourth in a series of blogs about Domain-specific accelerators (DSAs), which are becoming increasingly common in systems-on-chip (SoCs). Parts 1, 2 and 3 addressed key challenges such as data transfers between DSAs and the core complex, point-to-point ordering between cores and DSA memor...
Part 3: High-Bandwidth Accelerator Access to Memory: Enabling Optimized Data Transfers with RISC-V

Part 3: High-Bandwidth Accelerator Access to Memory: Enabling Optimized Data Transfers with RISC-V

Jan 30, 2020
This is the third in a series of blogs about Domain-specific accelerators (DSAs), which are becoming increasingly common in system-on-chip (SoC) designs. Part #1 addressed the challenges associated with data transfers between DSAs and the core complex, and showed how RISC-V offers a unique opportuni...
Part 1: High-Bandwidth Accelerator Access to Memory: Enabling Optimized Data Transfers with RISC-V

Part 1: High-Bandwidth Accelerator Access to Memory: Enabling Optimized Data Transfers with RISC-V

Jan 30, 2020
Domain-specific accelerators (DSAs) are becoming increasingly common in system-on-chip (SoC) designs. A DSA provides higher performance per watt by optimizing the specialized function it implements. Examples of DSAs include compression/decompression units, random number generators and network packe...
With SiFive, We Can Change the World

With SiFive, We Can Change the World

Jan 27, 2020
A Note from Chris Lattner, New SVP of Platform Engineering My quest is to build beautiful things that help change the world, and I’ve been fortunate to spend the last 15 years in Silicon Valley, working with some of the major players shaping all sorts of technology. Today, I’m super excited to join ...