获取来自领导者和RISC-V创始人的最新洞见

SiFive Blog 是您获取有关处理器IP、计算密度、芯片架构和创新突破最新消息的首选来源,无论是制造出色的可穿戴设备和消费电子产品,优化数据中心,还是构建下一代汽车。请经常查看,第一时间了解我们发布的最新内容。 

SiFive - November 17, 2023

Unlock the Possibilities with HiFive Unmatched RISC-V Development Boards

In stock today!

阅读更多

SiFive - November 17, 2023

SiFive’s Performance P470 Receives Best in Show Award at the RISC-V Summit

We’d like to thank our moms, the Academy and …well ok, maybe it’s not the Oscars but the 2023 RISC-V Summit was filled with innovation, collaboration, and a SiFive award for one of our most popular products! The SiFive Performance P470 RISC-V processor was awarded Embedded Computing Design’s Best in Show Award at this year’s event. Winning in the microelectronics, microprocessors and IP category, the SiFive Performance P470 brings unparalleled compute performance and efficiency to small size, high volume applications such as wearables, smart home devices, and consumer devices. At the Summit Samsung representatives spoke about their experience working with the P470 in silicon and also provided some great overall advice to the RISC-V ecosystem.

The SiFive Performance P470 is the company’s first efficiency-focused, Out-of-Order, area-optimized vector processor. It is significantly smaller than competing solutions and is optimized to have best-in-class performance efficiency and area density. The P470 delivers significant upgrade opportunities over legacy processors, offering impressive compute density, power efficiency, and robust feature sets to handle the most demanding workloads and bring significant cost savings to customers. Plus, the processor offers greater design flexibility to meet specific application needs, power budgets, and cost envelopes.

阅读更多

SiFive - October 26, 2023

未来之路

近年来,RISC-V 技术取得的进展令人瞩目。从最初作为基本嵌入式核心的 ISA,到现今在消费性产品、数据中心、自驾车和下一代可穿戴设备中发挥关键作用,这一变革速度之快、力度之大,出乎所有人的意料。RISC-V 社区从最初的几十名贡献者迅速增长至 3,900 多名会员,覆盖了各种市场、应用和地理位置。该 ISA 已成为整个半导体行业的基础技术,我们正共同见证 RISC-V 深刻变革的开端。许多全球最大、最具影响力的科技公司已加入了我们的行列,一同壮大这个生态系,随着时间的推移,RISC-V 社区将与其他社区相匹敌。高通和谷歌近期宣布将在基于 RISC-V 的可穿戴设备平台上展开合作,为生态系内更多的 RISC-V 产品铺路,这是一具有突破性意义的里程碑,也进一步突显了 RISC-V 势不可挡的发展趋势。

阅读更多

SiFive - September 14, 2023

Arm IPO Underscores the Ongoing Compute Supercycle

SiFive congratulates Arm on its IPO, which represents a momentous step forward for the entire semiconductor ecosystem. This IPO has brought more awareness to the public about the critical role of computing architectures, specifically the instruction set architecture (ISA), and the need for high-quality, high-performance processor IP to drive our industry forward. Competition is essential for a healthy semiconductor industry, and we continue to hear from companies about the importance of having choice in the processor market, especially after the chip supply challenges of the last few years. Arm has helped focus a spotlight on the ISA and CPU IP, and is highlighting its criticality to the fastest growing areas of semiconductors, areas like datacenter and AI, automotive, consumer, and mobile.

Part of the excitement has been a new recognition of how big the market opportunities are, and there is room for all of us. These markets need rapid innovation and customization, which are consistent themes in our conversations with customers. It’s no secret that SiFive’s founders developed RISC-V as a response to the limited customization options of closed, proprietary architectures. We work with global technology leaders and SiFive’s high-performance IP is being designed into everything from aerospace applications to automotive, the datacenter, wearables, and beyond. While the semiconductor landscape has evolved considerably since then, what hasn’t changed is that companies want design flexibility and freedom: SiFive and RISC-V make that possible. After all, there are no limits with RISC-V.

阅读更多

SiFive - July 06, 2023

ASIL B Ready Certification for SiFive Automotive Solutions

SiFive recently received its official ASIL-B Ready Functional Safety Certificate from the SGS-TUV organization, and to understand the implications, I discussed this achievement with SiFive’s industry recognized Automotive Functional Safety experts, Priyanka Thachakuzhiyil Viswanathan, Director Functional Safety and Cybersecurity, and Monia Chiavacci, Sr. Principal Architect, Functional Safety. This is a great step forward for our customers. Here’s what I learned.

阅读更多

SiFive - May 30, 2023

Expanding the RISC-V Ecosystem, with PX5, IAR and SiFive

Bob Monkman (SiFive), with Bill Lamie (PX5) and Rafael Taubinger (IAR)

阅读更多

SiFive - May 22, 2023

Ansys Joint Webinar: SiFive Maximizes Compute Density With Its RISC-V Processor Cores

You are invited to attend an upcoming webinar where Ansys will talking with SiFive's Phil Dworsky to discuss the pursuit of maximum compute density in our RISC-V processor cores.

阅读更多

SiFive - March 30, 2023

SiFive Expands U.S. Presence with New Office in Boston

In March, SiFive announced the opening of its new office in the greater Boston area. 2022 was a monumental year for SiFive and 2023 is shaping up to be another strong year. Marlborough was an ideal location for the new office as the company continues to expand its footprint and serve our growing customer base located in Massachusetts and the surrounding Northeast region.

The office will be led by Shubu Mukherjee, vice president of architecture at SiFive, with plans to grow its headcount in the next 12-to-24 months. The greater Boston area is rich in talent in all areas of semiconductor development, including architecture, RTL, digital verification, and physical design, as well as sales, marketing, and business development. Having a physical presence in the area will help reach both experienced professionals as well as tap into the strong University programs in the region.

SiFive Boston team members celebrate opening SiFive is always seeking talented designers and engineers ready to make an impact on the world and help accelerate the adoption of RISC-V. You can always check our website for open roles. Careers

阅读更多

SiFive - March 22, 2023

Unleashing the Potential of RISC-V: A Recap of the SiFive Tech Forum

As the inventors of RISC-V and performance density leaders, SiFive is committed to spreading the word about how this groundbreaking open architecture is reshaping the computing industry and ushering in new possibilities. Last week, we hosted the SiFive Tech Forum in Hsinchu, the technology heart of Taiwan, to bring together hardware engineers, developers, and other technology leaders to talk about the incredible momentum of RISC-V to-date and how SiFive is leading the RISC-V revolution. The event was well over subscribed, which highlighted the eagerness with which the attendees were keen to learn about the latest SiFive solutions. Read on to find out more about what we covered during the SiFive Tech Forum. And you can view the presentations here

Taiwan event

阅读更多

SiFive - March 14, 2023

Meet us at embedded world

SiFive is in attending 2023’s embedded world from March 14-16, and we’d love to see you there! Meet us in Nürnberg to learn about some of our recent announcements, including our new processors for wearables. These new processors, the P670 and P470, offer unrivaled choice and flexibility with the perfect balance of performance and efficiency. The P670 is ideal for applications like premium wearables, networking, robotics, and mobile. Meanwhile, the P470 – SiFive’s first efficiency-focused Out-of-Order, area optimized, vector processor – is designed for applications like wearables, consumer, and smart home devices.

In case you missed it, we also recently introduced new automotive processors. SiFive’s Automotive X280-A, E6-A, and S7-A solutions address critical needs for current and future automotive applications like infotainment, cockpit, connectivity, ADAS, and electrification. The X280-A (the automotive version of SiFive’s X280 vector processor) has industry-leading performance to meet the complex computing requirements of sensor fusion and ML intensive workloads. The E6-A series is designed for real-time, 32-bit applications including system control, hardware security modules (HSMs), and safety islands, and also serves as a standalone solution for microcontrollers. Additionally, the S7-A is a 64-bit, high-performance real-time core optimized for the needs of modern SoCs with performant safety islands.

Let us know if you’d like to set up a meeting to learn more about these new products and how the open era of computing is transforming the semiconductor industry. SiFive saw record growth in 2022 driven by global demand for RISC-V and a growing awareness of it's compute density and power efficiency advantages. We work closely with more than 100 leading customers in applications including automotive, AR/VR, client computing, datacenter, and the intelligent edge. To set up a meeting, please contact sifive@racepointglobal.com.

阅读更多

SiFive - January 05, 2023

SiFive Makes a Splash at the RISC-V Summit with 10+ Talks, Demos, and a Surprise Product Reveal

At the 2022 RISC-V Summit, SiFive highlighted collaborations with some of the world’s biggest companies in our 10+ talks on stage and with our demos. SiFive also gave an exclusive first look at an upcoming product, and three of our employees won awards.

One highlight was the keynote from SiFive’s CEO, Patrick Little: “RISC-V Spotlight: RISC-V Everyone Wins”. Patrick highlighted how the momentum and excitement for RISC-V is growing and how today it is in billions of cores on the market and is being designed into a huge range of applications. Patrick covered the early vision for RISC-V and emphasized the importance of collaborating to build a strong community and ecosystem for RISC-V.

As part of our efforts to build out the RISC-V ecosystem, SiFive has partnered with Intel to develop the HiFive Pro P550 Development System (previously code-named Horse Creek). During his keynote, Patrick was joined on stage by Intel Foundry Services’ Bob Brennan to share a first look at this high performance platform that features a quad-core SiFive Performance™ P550 processor and is implemented in the Intel 4 technology platform. The board will enable a new generation of RISC-V software, continuing the tradition of SiFive HiFive boards that have helped drive the growth of the RISC-V ecosystem. The board will be commercially available in the summer of 2023.

SiFive ecosystem partners and customers, including Ashling, AWS, Canonical Ubuntu, Codeplay, Google, Imperas, Intel, Lauterbach, Microchip, Qualcomm, Rice University, Solid Sands, Synopsys, and Tenstorrent, were featured throughout the event and in a panel session entitled “It takes a village… to build an ecosystem,” which reviewed the strong state of the RISC-V ecosystem as well as the next steps that key contributors are leading.

SiFive’s additional presentations throughout the event focused on our collaborations and partnerships to bring our high-performance RISC-V portfolio to automotive, aerospace, and beyond. For example, through our partnership with Microchip, SiFive is a part of NASA’s next generation High-Performance Spaceflight Computing (HPSC) processor, which delivers a 100x increase in computational capability to help propel next-generation planetary and surface missions. Jack Kang, SVP, Biz Dev, CX, Corp Marketing at SiFive, summed up why so many companies are choosing RISC-V and SiFive: “RISC-V products are just better. Better power, better performance, and more.”

Jack also took some time to chat with RISC-V International’s CEO Calista Redmond about our momentum to-date and what’s ahead.

SiFive continues to invest strongly in the RISC-V community, with many of our employees actively participating in RISC-V International’s technical committees. In recognition of these efforts, three of SiFive’s employees won awards from RISC-V International. Yunsup Lee, SiFive’s Co-Founder & Chief Technology Officer, received a Technical Contributor Award for his work as Chair of the Technical Steering Committee (TSC). Craig Topper, Principal Compiler Engineer, and Kito Cheng, Compiler Engineer, received Software Contributor Awards for their hard work on RISC-V technical committees. Check out the full list of winners here.

You can read more about SiFive’s latest activities and momentum in 2022 here. To watch SiFive’s presentations at the RISC-V Summit, visit here.

阅读更多

SiFive - November 28, 2022

SiFive Expands Presence in India to Keep Up with the Company’s Ultra-fast Growth

SiFive has seen tremendous growth over the past few years with strong year-over-year revenue growth and is in the top 10% of the Inc. 5000 list of private companies. With more than 550 employees around the world, we’re continuing to grow our team and expand our footprint across different regions to meet the strong customer demand for SiFive’s innovative RISC-V IP.

India is one region in particular where we’re focused on building out our team. This month SiFive opened a new design center in Bangalore, India. We have around 90 employees working there currently, and the space has room for around 150 employees as we continue to grow. The Bangalore team is focused on leading edge CPU and platform design, verification, physical implementation and software.

阅读更多

SiFive - October 04, 2022

SiFive’s Shubu Mukherjee Recognized Along with Fellow Authors with SIGGMICRO’s Test of Time Award

In the fast moving Semiconductor Industry, predictions and papers become obsolete fast and so it’s worth recognizing when a paper has a significant impact on our industry that also has a bit of a timeless nature. The paper, A systematic methodology to compute the architectural vulnerability factors for a high-performance microprocessor (you can read it here was recognized during the award ceremony at MICRO 22 in Chicago October 4th, and we’re proud to share that our very own VP of Architecture, Shubu Mukherjee, (who was at Intel at the time it was written) was there to accept the award on behalf of his fellow authors, Christopher Weaver, Joel Emer, Steve Reinhardt and Todd Austin.

阅读更多

SiFive - September 21, 2022

SiFive Intelligence X280 as AI Compute Host: Google Datacenter Case Study

At the AI Hardware Summit in Santa Clara, September 14th, Krste Asanovic, SiFive Co-Founder and Chief Architect, took to the stage with Cliff Young, Google TPU Architect and MLPerf Co-Founder, to reveal how the latest SiFive Intelligence™ X280 processor with the new SiFive Vector Coprocessor Interface Extension (VCIX) is being used as the AI Compute Host to provide flexible programming combined with the Google MXU (systolic matrix multiplier) accelerator in the datacenter. They also talked about why this type of architecture is becoming popular for AI/ML workloads, and how, with this configuration, SiFive provides essential compute capabilities so Google can focus on deep learning SOC development. A video of the talk is expected to be available in early October.

阅读更多

SiFive - September 13, 2022

Introducing SiFive Automotive Products

The Next SiFive Revolution

As SiFive announces its long-term plans to meet the rapidly changing needs of the automotive markets, this blog explores the many advantages the SiFive Automotive™ portfolio brings across a wide range of current and future applications, including; electrification, cockpit, ADAS, safety, and others. Our power efficient, flexible and high-performance cores are ideally suited for the most critical applications, and are of course, supported by the global RISC-V ecosystem.

阅读更多

SiFive - August 18, 2022

Introducing the Latest SiFive® Intelligence™ X280 Processor Innovation - the Vector Coprocessor Interface Extension (VCIX)

In June 2022, SiFive released an enhanced version of the market-leading SiFive® Intelligence™ X280 processor to take a further leap in performance for AI inference, image processing, and datacenter applications.

阅读更多

SiFive - August 18, 2022

SiFive's RISC-V Leadership Strengthens with New Vector Solutions

With the 2021 launch of the SiFive® Intelligence™ X280, SiFive was the first company to release a RISC-V Vector 1.0 product, and it took the market by storm. The X280 has quickly achieved market-leading success, with design wins across a number of high performance applications including AI inference, Image Processing, and Datacenter applications. Customers include a U.S. government agency working on next generation aerospace/defense standards, a tier #1 global mobile image processor supplier, and a tier #1 global hyperscaler for AI, and the list grows daily..

阅读更多

SiFive - August 16, 2022

SiFive Ranks in Top 10 Percent of Inc.’s Fastest Growing Private Companies in America List

If you haven’t seen it, SiFive is ranked in the top 10 percent of Inc.’s annual list Here of the fast-growing private companies in America which includes a wide range of industries. This ranking is a direct reflection of our impressive revenue growth the past three years and our momentum, forward trajectory, and leadership in the processor IP market. By the numbers, SiFive is ranked No. 413 overall, and we are excited to rank an impressive second (No. 2) in computer hardware.

阅读更多

SiFive - August 04, 2022

SiFive arrives on the pitch in Cambridge

Cambridge, with a long history of innovation and invention and a thriving tech ecosystem, is an obvious choice as a location for SiFive to continue its global expansion. We’re all about attracting the best talent, anywhere, and part of our mission and values is to also give back to, and be an active participant in the communities where we do business. As we expand in Cambridge we found a great partner with Cambridge United Football Club and this week announced our sponsorship as part of a week-long celebration. See the promotional video Here

Winning combination

阅读更多

SiFive - June 01, 2022

Introduction To The SiFive Intelligence X280

SiFive is the market leader in RISC-V Vector processors with the flagship SiFive vector processor, the SiFive Intelligence X280, leading the charge as a clear favorite with customers, with solutions being designed into a broad range of applications ranging from computer vision, mobile ISP, Edge AI, to datacenter AI.

阅读更多

SiFive - June 01, 2022

Introduction To SiFive Vector Processors

After describing the current 2022 broad SiFive Performance, Intelligence, and Essential Processor Product portfolio, this webinar introduction to the SiFive vector processors begins by identifying some of the challenges that exist for system designers and subsequent evolving application trends.

阅读更多

SiFive - June 01, 2022

10 Important Things To Know About SiFive Vectors

A great way to get to know more about popular SiFive vector processors, which are compatible with the RISC-V Vector (RVV) version 1.0 specification

阅读更多

SiFive - June 01, 2022

SiFive - The Market Leader In RISC-V Vectors

SiFive is the market leader in RISC-V Vector processors and has gained significant market traction, with solutions being designed into a broad range of applications ranging from computer vision, mobile ISP, Edge AI, to datacenter AI.

阅读更多

SiFive - February 14, 2022

The Investment Heard Around The World

The RISC-V revolution continues to advance as the technology industry embraces open computing to address semiconductor design and business challenges

阅读更多

SiFive - February 07, 2022

RISC-V is Ready for Great Challenges

SiFive joins the Intel Foundry Services IP Alliance program to broadly enable innovative new computing platforms

阅读更多

SiFive - January 14, 2022

The Rapid Rise of RISC‑V

SiFive is aiming high with bold new technology for performance-driven applications

阅读更多

SiFive - December 10, 2021

When You Reach The Summit, Keep Climbing

The RISC-V Summit 2021 highlighted to the world that the future of RISC-V has no limits!

阅读更多

SiFive - November 19, 2021

Accelerating the Future of RISC-V

The freedom of RISC-V enables a bright future for SiFive

阅读更多

SiFive - November 17, 2021

RISC-V is Inevitable

In just a few short years, RISC-V has become a category of utmost importance in tech; but, things are just getting started.

阅读更多

SiFive - September 16, 2021

RISC-V Chiplets, Disaggregated Die, and Tiles

Scalable High-Performance Computing SoC Design with RISC-V

阅读更多

SiFive - July 27, 2021

Delivering on the Promise of Industry-Leading RISC-V Processors

Leading the RISC-V uprising drives SiFive, home of the inventors of RISC-V, to continue to push forward with developing our product families and technologies.

阅读更多

SiFive - June 22, 2021

The Heart of SiFive is Performance, Intelligence, & Essential

Introducing the new era of SiFive Performance for RISC-V

阅读更多

SiFive - April 23, 2021

What’s new in AI & ML from SiFive

Introducing the SiFive Intelligence X280

阅读更多

SiFive - April 13, 2021

SiFive RISC-V Proven in 5nm Silicon

OpenFive Tapes Out SoC for Advanced AI/HPC Solutions on TSMC 5nm Technology

阅读更多

SiFive - April 08, 2021

SiFive Vector Processing Solutions To Be Highlighted at Linley Spring Processor Conference 2021

Tremendous progress has been made in the last year bringing RISC-V vector (RVV) extensions to market in both hardware implementations and supporting compiler technologies.

阅读更多

SiFive - March 30, 2021

SiFive Core IP 21G1

The best just got better--SiFive’s latest Processor Core IP Portfolio release

阅读更多

SiFive - March 23, 2021

SiFive collaborates with new Intel Foundry Services to enable innovative new RISC-V computing platforms

Enabling more choice for Next-Generation Heterogeneous Compute Platforms

阅读更多

SiFive - November 20, 2020

SiFive Strengthens Foothold in Storage Applications for Data-Centric AI Computing

SiFive RISC-V processors are powering flash drives in production as well as addressing emerging In-Storage Computing (ISC) needs

阅读更多

SiFive - October 29, 2020

The Heart of RISC-V Development is Unmatched

Creating a RISC-V PC Ecosystem for Linux application development

阅读更多

SiFive - October 15, 2020

The SiFive 20G1 Update for 7-Series Core IP

Faster, More Efficient SiFive 7-Series Core IP

阅读更多

SiFive - September 17, 2020

The Incredible Opportunity For SiFive

A note from SiFive President & CEO, Patrick Little

阅读更多

SiFive - September 03, 2020

Randomness is Secure with SiFive Shield HCA

Building a secure foundation using the concept of randomness seems, on the surface, counter-intuitive.

阅读更多

SiFive - September 03, 2020

RISC-V Vector Extension Intrinsic Support

The RISC-V Vector extension (RVV) enables processor cores based on the RISC-V instruction set architecture to process data arrays, alongside traditional scalar operations to accelerate the computation of single instruction streams on large data sets.

阅读更多

SiFive - August 17, 2020

OpenFive's Customizable Silicon-Focused Solutions

OpenFive is a solution-centric and processor agnostic custom silicon business unit dedicated to building optimized domain-specific SoCs

阅读更多

SiFive - July 22, 2020

SiFive Core IP 20G1

SiFive's Best Processor Portfolio Is Here

阅读更多

SiFive - April 30, 2020

SiFive In The Time of COVID-19

A Message From The CEO

阅读更多

SiFive - April 27, 2020

SiFive’s Approach to Embedding Intelligence Everywhere

Published by SemiWiki.

阅读更多

SiFive - April 10, 2020

SiFive Connect : SiFive in Virtual World-Webinar Series

阅读更多

SiFive - March 25, 2020

Cloud Accelerated Idea To Silicon

The SiFive Mission

阅读更多

SiFive - March 17, 2020

Introducing SiFive Insight

Access, Observe, Control

阅读更多

SiFive - March 04, 2020

The RISC-V Revolution is Going Strong in Ahmedabad

阅读更多

SiFive - February 29, 2020

Our SiFive Tech Symposiums in Costa Rica and Mexico Underscore the Global Adoption of the RISC-V ISA in Industry and Academia

阅读更多

SiFive - February 24, 2020

Part 4: High-Performance Interconnect for Accelerators: Enabling Optimized Data Transfers with RISC-V

阅读更多

SiFive - January 30, 2020

Part 3: High-Bandwidth Accelerator Access to Memory: Enabling Optimized Data Transfers with RISC-V

阅读更多

SiFive - January 27, 2020

With SiFive, We Can Change the World

A Note from Chris Lattner, New SVP of Platform Engineering

阅读更多

SiFive - January 21, 2020

Part 2: High-Bandwidth Core Access to Accelerators: Enabling Optimized Data Transfers with RISC-V

阅读更多

SiFive - January 13, 2020

Part 1: Fast Access to Accelerators: Enabling Optimized Data Transfer with RISC-V

阅读更多

SiFive - December 20, 2019

SiFive Completes its Global 52-City Tech Symposium/Workshop Tour

阅读更多

SiFive - November 30, 2019

SiFive’s Tech Symposiums and Workshops Throughout South America Included Participation by Both Academia and Industry

阅读更多

SiFive - November 14, 2019

Our SiFive Tech Symposiums in Pakistan Drew Over 2,500 Attendees!

阅读更多

SiFive - November 13, 2019

We Just Completed Five Energy-Filled Tech Symposiums and RISC-V Workshops Throughout the Middle East Region

阅读更多

SiFive - November 08, 2019

The SiFive Tech Symposiums in Portland and Seattle are a Wrap

阅读更多

SiFive - October 24, 2019

Incredibly Scalable High-Performance RISC-V Core IP

Introducing the new SiFive U8-Series Core IP

阅读更多

SiFive - October 23, 2019

SiFive Shield: An Open, Scalable Platform Architecture for Security

Securing The RISC-V Revolution

阅读更多

SiFive - October 17, 2019

The SiFive Tech Symposiums are Heading To Portland and Seattle This Month – See You There!

阅读更多

SiFive - September 26, 2019

Making It Easy To Get It Right

阅读更多

SiFive - September 17, 2019

Supporting A World Leading RISC-V IP Portfolio

阅读更多

SiFive - September 13, 2019

Israel is Evolving as a High-Tech Hub, and RISC-V is Playing a Vital Role

阅读更多

SiFive - September 11, 2019

NVDLA Deep Learning Inference Compiler is Now Open Source

阅读更多

SiFive - September 05, 2019

Collaboration, Inspiration and Progressive RISC-V Based Innovation in India and Bangladesh is Increasing at a Steady Pace

阅读更多

SiFive - July 26, 2019

SiFive Fosters RISC-V Collaboration and Education in India and Bangladesh Via Symposiums, Tutorials and Workshops

阅读更多

SiFive - July 22, 2019

Dhrystone Performance Tuning on the Freedom Platform

For consumers of low-end processors, the Dhrystone benchmark can be a valuable tool for estimating performance. Due to the nature of the Dhrystone benchmark, high-end Application Processor performance is incompletely represented by a Dhrystone score. For processor providers a Dhrystone score is a commonly used metric for instruction throughput comparison in early stage evaluation.

阅读更多

SiFive - July 17, 2019

The Design Revolution in APAC and Australia

Highlights From the SiFive Tech Symposiums

阅读更多

SiFive - June 25, 2019

Silicon At The Speed of Software

The Information age transformed the world, fueled by silicon chips that became more powerful and more cost-effective every 18 months. The thinking of silicon design was led by engineers in the pursuit of faster, smaller transistors. As the Experience Age transcends the Information Age, the law underneath the technology changes from what’s possible, to what’s needed. Now, the ability to create purpose-built processors – secure, fast, efficient, and cost-effective – is the defining characteristic inside products that change lives through improved experiences and abilities.

阅读更多

SiFive - June 25, 2019

Freedom in Software and in the Metal

With the move to a quarterly release program (see: Silicon At Speed Of Software), SiFive is innovating in the hardware space at an unprecedented pace. In the SiFive Core Designer update and the Core IP update we learned about new features being added to SiFive Core IP and the ability to quickly access those features via SiFive Core Designer, SiFive's Software-as-a Service (SaaS) application. We have also been hard at work making sure that our software enablement is just as configurable, and easy to access, as our hardware.

阅读更多

SiFive - June 25, 2019

Three New Core Series Now Available in SiFive Core Designer

SiFive Core Designer (SCD) unlocks new possibilities by enabling engineers to explore the architectural design space of a CPU. With our Software-as-a Service (SaaS) application, customers can create and customize RISC-V core IP -- from their laptops.

阅读更多

SiFive - June 25, 2019

When Hardware Roadmaps Look Like Software Roadmaps

The traditional cadence for microarchitecture updates is usually tied to process technology nodes or ground-up redesigns. The SiFive Core IP portfolio offers scalable microarchitectures from efficient application multi-core processors capable of running Linux, to tiny, power-sipping cores suitable for the most area constrained design points. The SiFive quarterly update program delivers key improvements, new features, and more capabilities to SiFive Core IP in a measured, methodical way. Here’s all the information you need on the SiFive Core IP Series and the latest updates!

阅读更多

SiFive - June 10, 2019

The RISC-V Revolution is Sweeping Across the APAC Region and Australia

Join SiFive Tech Symposiums in Tokyo, Daejeon, Pangyo, Hsinchu, Singapore and Sydney

阅读更多

SiFive - May 30, 2019

The Design Revolution in Europe: Highlights From the SiFive Tech Symposiums

We just wrapped up our six-city tour in Europe, which included Cambridge, Grenoble, Stockholm, Moscow, Munich and Amsterdam. Together with our co-hosts, Qamcom, Syntacore, Imagination Technologies and Mentor; and ecosystem partners, Rambus, IAR Systems, UltraSoC, Antmicro, SecureRF, Credo and lowRISC, we engaged with over 500 responses/registrations throughout the tour.

阅读更多

SiFive - May 13, 2019

The SiFive Tech Symposiums are Heading to Six Cities in Europe in May!

Hello Cambridge, Grenoble, Stockholm, Moscow, Munich and Amsterdam

Our 2019 global symposiums and workshops have been hugely successful in promoting the RISC-V ISA and fostering expansive collaboration within the open-source community. It's invigorating to see how the worldwide semiconductor ecosystem is energized and mobilized by the open ISA. One of the areas receiving the most attention is embedded intelligence. The RISC-V ISA is enabling designers and innovators to actively pursue solutions that employ enhanced embedded intelligence at the edge. The real-world applications of this are awesome and we are inspired by what we see!

阅读更多

SiFive - March 29, 2019

Freedom Studio Version 2019.03

Freedom Studio

阅读更多

SiFive - March 19, 2019

The Revolution Evolution Continues - SiFive RISC-V Technology Symposium - Part II

During the afternoon session of the Symposium, Jack Kang, SiFive VP sales then addressed the RISC-V Core IP for vertical markets from consumer/smart home/wearables to storage/networking/5G to ML/edge. Embedding intelligence from the edge to the cloud can occur with U Cores 64-bit Application Processors, S Cores 64-bit Embedded Processors, and E Cores 32-bit Embedded Processors. Embedded intelligence allows mixing of application cores with embedded cores, extensible custom instructions, configurable memory for application tuning and other heterogeneous combination of real time and application processors. Some recently announced products is Huami in Wearable AI, Fadu SSD controller in Enterprise, Microsemi/Microchip upcoming FPGA architecture. Customization comes in 2 forms, customization of cores by configuration changes and by custom instructions in a reserved space on top of the base instruction set and standard extensions, guaranteeing no instruction collision with existing or future extensions, and preserving software compatibility.

阅读更多

SiFive - March 19, 2019

Freedom Everywhere — Back for Everyone!

HiFive1 Rev B: The Second Generation HiFive1 Dev Board and the Freedom Everywhere SoC, FE310

阅读更多

SiFive - March 18, 2019

The Revolution Evolution Continues - SiFive RISC-V Technology Symposium - Part I

SiFive held a RISC-V Technology Symposium on February 26 at the Computer History Museum in Mountain View. Keith Witek, SiFive SVP Corporate Development and Strategy kicked off the event and introduced the first keynote speaker Martin Fink, Western Digital CTO, at the time acting CEO of the RISC-V Foundation (as of this writing, Calista Redmond was just appointed the new CEO of the RISC-V Foundation). He shared a slide showing the growing RISC-V ecosystem from tools vendors, to IP/semi chip providers and design/foundry services. He stated that, moving forward, the areas of focus will include standards/specs, ecosystem growth, awareness and education.

阅读更多

SiFive - March 13, 2019

The First Leg of our Global Symposiums is a Wrap, and it was an Enormous Success!

We welcomed over 600 attendees to the SiFive Tech Symposiums in Austin, Mountain View and Boston. The feedback we received is flattering. We heard comments like, “You guys are going bold, and we love it!” and “SiFive has built a solid team with good breadth of business and technology expertise,” and “Very different take – and someone is addressing the pain point for hardware folks, finally!” There was a great deal of energy in the crowd, and people were thoroughly engaged all day long. Here’s a look back at some of the highlights:

阅读更多

SiFive - February 21, 2019

The RISC-V Revolution is Going Global

This Month, you can join SiFive in Austin, Mountain View, or Boston

In 2018, we hosted several RISC-V technology symposia in India, China and Israel. These events were very successful in fueling the growing momentum surrounding the RISC-V ISA in these countries. It turns out that these events were just the tip of the iceberg. In 2019, SiFive is greatly expanding its reach by hosting over 50 SiFive Tech Symposia in cities throughout the world. The first leg of the global tour begins in the USA. In collaboration with our co-hosts and partner companies, we aim to foster deeper education, collaboration and engagement within the open-source community.

阅读更多

SiFive - January 04, 2019

Embedded Intelligence Everywhere

In 2018, we saw the rapid proliferation of the RISC-V architecture, with commercial deployments of SiFive Core IP in a broad range of applications ranging from wearables and edge devices to the enterprise core. Modern compute workloads are evolving rapidly and require the ability to scale performance on demand and very often have real-time, deterministic requirements. This diversity of workloads poses computational challenges that can be resolved only by domain-specific architectures. With the advent of 5G, core networks are transforming from hierarchical models in which intelligence was concentrated at the core to a decentralized structure where intelligence is getting distributed to the edge.

阅读更多

SiFive - December 27, 2018

You Will Not Get Fired for Choosing RISC-V

Published by SemiWiki.

阅读更多

SiFive - December 18, 2018

Open Standards Work!

We are really excited to see Wave Computing announce the open MIPS ISA and R6 processor core. SiFive would like to congratulate and welcome MIPS to the open-source community with its MIPS Open Initiative. The addition of the MIPS 32 and 64-bit open ISA will provide more options freely available to SoC designers. The open-source processor community, based on the RISC-V ISA, is thriving, and the addition of MIPS underscores the fact that the world is indeed becoming more open. Open ISA enables chip designers, innovators and academics to explore and expand their designs. The ability to add extensions to the base ISA makes it an attractive option for applications requiring special configurations. Chip designers no longer have to settle for an off-the-shelf processor. SiFive RISC-V cores have enabled a high degree of customization, which our customers have loved and used to create designs at 1/3 the power and area versus other solutions.

阅读更多

SiFive - October 30, 2018

Getting Started with Zephyr RTOS v1.13.0 On RISC-V

Hi everyone! I'm Nathaniel Graff, a software engineer here at SiFive, and I'm excited to tell you about the most recent release of Zephyr RTOS, version 1.13.0! Zephyr RTOS is a real-time operating system hosted by The Linux Foundation, featuring support for a myriad of different platforms, architectures, and targets including SiFive's E-series CoreIP, and the HiFive 1 development board.

阅读更多

SiFive - October 19, 2018

Last Week in RISC-V: October 19, 2018

It's been another week, which means it's time to find another host for "Last Week in RISC-V". This week we're going to attempt a blog at riscv.org, which will hopefully be a good long-term home for this series of articles.

阅读更多

SiFive - October 12, 2018

Last Week in RISC-V: October 12, 2018

This week's entry is fairly short, but it does come with one major improvement: we now have a mailing list! I've decided to create a Google Group at SiFive, and while I understand that's not ideal it's the best I can figure out for now. The Google Groups interface is quick clunky, so if you're looking for archives it's probably still best to use GitHub. Hopefully this makes it easier for people to find the mailing list.

阅读更多

SiFive - September 28, 2018

Last Week in RISC-V: Sept 28, 2018

阅读更多

SiFive - September 21, 2018

Last Week in RISC-V: Sept 21, 2018

Introduction to Linux Kernel Development

阅读更多

SiFive - September 14, 2018

Last Week in RISC-V: Sept 14, 2018

GNU Tools Cauldron Trip Report, Part 2

阅读更多

SiFive - September 07, 2018

Last Week in RISC-V: Sept 7, 2018

This is the last version of "Last Week in RISC-V" that I plan on sending to the various mailing lists, as we'll be posting the rest of them on SiFive's Blog. I didn't get any contributions, but I also haven't gotten through my email yet -- sorry if I missed anything that's been sent it, but I'm not too far behind so I should have everything read from this week by the end of next week.

阅读更多

SiFive - September 06, 2018

An Open Source Release of the Freedom U540-C000's Bootloader

The FU540-C000, which is available on the HiFive Unleashed development board, is a Linux capable board based on the open source Freedom platform. We built this chip to drive RISC-V Linux development, and it's been incredibly successful. In the three months since we started shipping the board the RISC-V Linux distribution porting effort, with Debian and Fedora leading the charge, has come farther that it had come in the previous 5 years. It's been incredible watching the open source community get behind the RISC-V ISA, and the level of progress has exceeded anything we could have predicted at the beginning of this year.

阅读更多

SiFive - August 31, 2018

Last Week in RISC-V: August 31, 2018

Welcome to the first issue of "Last Week in RISC-V", a weekly newsletter tracking the RISC-V community. This newsletter was born out of a discussion in SiFive's internal RISC-V software team and I'm compiling it so it'll have a somewhat heavy focus on the open source software community for now as that's where I spend most of my time. The general idea behind "Last Week in RISC-V" is that the RISC-V ecosystem is getting big enough that it's impossible for any single person to track everything going on. For a while we had the patches mailing list, but we've outgrown a single mailing list for all development -- plus, this mailing list is just for patches to core RISC-V software components so it isn't wide enough in scope to cover everything going on it the RISC-V ecosystem.

阅读更多

SiFive - July 31, 2018

SiFive Hosts Girl Geek X and Champions Custom Silicon For All

On Wednesday, July 25th, SiFive had the pleasure of hosting Girl Geek X at our offices in San Mateo. Girl Geek X is a brilliant organization with the aim of connecting women across companies large and small for the purposes of networking and sharing career advice in the fast-paced tech industry. Over the past 10 years, Girl Geek X has grown from a 400-person dinner hosted by Google to a well-known Bay Area group with a membership base of more than 15,000.

阅读更多

SiFive - July 12, 2018

Interrupts on the SiFive E2 Series

Last week SiFive launched the new E2 Series RISC-V Core IP. The E2 Series represents SiFive’s smallest, most efficient Core IP Series and is targeted specifically for embedded microcontroller designs. One of the reasons it is great for microcontroller applications is because of its extremely small area footprint, just 0.023mm2 in 28nm for the entire E20 Standard Core! Another reason it's great for the embedded market is its configurability. The E2 Series can be configured even smaller than the E20 Standard Core by removing things like the Interrupt Controller and support for the M extension. Another major reason the E2 Series is great for microcontroller applications is its support for the new RISC-V Core Local Interrupt Controller (CLIC) which allows for extremely low latency interrupt operation, hardware preemption, and hardware prioritization of all interrupts. The CLIC specification is a result of collaboration between RISC-V members in the RISC-V Foundation’s Fast Interrupts Technical Group and the draft specification can be found here.

阅读更多

SiFive - June 04, 2018

Unleashing More Fun Under the Sun

Good news, HiFive fans! A limited supply of HiFive Unleashed Development Kits are now available on CrowdSupply for purchase.

阅读更多

SiFive - May 30, 2018

The SiFive Download - What's Up Next?

We recently announced that Intel Capital participated in our Series C funding round! Our CEO, Naveed Sherwani, revealed the investment earlier this month at the Intel Capital Global Summit.

阅读更多

SiFive - May 08, 2018

Intel Capital Investment Boosts Vision for the Future

We’re very happy to announce that Intel Capital participated in our recent Series C funding round. The investment was revealed at the Intel Capital Global Summit earlier today.

阅读更多

SiFive - April 25, 2018

RISC-V QEMU Part 2: The RISC-V QEMU port is upstream

QEMU 2.12.0 was released on April 24th 2018 and this version is the first official QEMU version to contain the RISC-V port. This is yet another milestone towards the development of the Open Source RISC-V tools on top of the recent acceptance of RISC-V in Linux kernel 4.15 in December last year and GLIBC 2.27 this past February.

阅读更多

SiFive - April 17, 2018

Dover Microsystems Brings Real-Time Chip Security to SiFive’s DesignShare

Boy have we been busy. Over the last few months, our DesignShare ecosystem has continued to expand, and, this week, we were excited to welcome Dover Microsystems into the program.

阅读更多

SiFive - April 16, 2018

The SiFive Download - The Next Revolution is Here!

First, we are thrilled to have recently announced that we raised $50.6 million in our Series C funding round! We wanted to thank our existing and new investors - including Chengwei Capital, Huami, SK Telecom and Western Digital - for the continued support and new engagement, so we held a party to celebrate!

阅读更多

SiFive - March 06, 2018

The SiFive Download - Are you ready to UNLEASH your genius?

We’re heading to the Embedded Linux Conference next week, March 12-14, to hold our first hackathon. Developers will be among the first to run code on the HiFive Unleashed board with a chance to take home a board of their own and win a $1,000 cash prize.

阅读更多

SiFive - March 03, 2018

All Aboard, Part 11: RISC-V Hackathon, Presented by SiFive

Date: Monday, March 12 – Wednesday, March 14
Time: 10:30am Monday – 1:00pm Wednesday
Location: Embedded Linux Conference, Hilton Portland Downtown, Skyline II, Floor 23

阅读更多

SiFive - March 01, 2018

Welcome Aboard, Sunil Shenoy!

As our business continues to grow, the people we hire continue to impact and shape our business more and more.

阅读更多

SiFive - February 20, 2018

All Aboard, Part 10: How to Contribute to the RISC-V Software Ecosystem

We recently announced the HiFive Unleashed, a development board for Freedom U540-C000, the world's first Linux-capable RISC-V ASIC. The announcement of this board roughly lined up with the first upstream releases of Linux and glibc that contain RISC-V support. As a result, our news has driven a lot of interest from the open source software community -- that was really the whole point of announcing the board in the first place, so in that sense it's working out very well.

阅读更多

SiFive - January 23, 2018

The SiFive Download - Ringing in 2018 with Fresh Faces and Big Resolutions

Before we dive into our newsletter, we want to take a moment to talk about the vulnerabilities around Meltdown and Spectre. First off -- and most fortunately -- SiFive’s RISC-V Core IP offerings are not affected by Meltdown and Spectre. Secondly, as the RISC-V Foundation’s statement on these vulnerabilities notes, now is the time for open architecture and open hardware designs to shine.

阅读更多

SiFive - January 05, 2018

SiFive Statement on Meltdown and Spectre

The recently disclosed speculation-based timing attacks Meltdown and Spectre have received much attention this week—and rightly so. The vulnerabilities these attacks exploit are not limited to a particular instruction-set architecture, nor are they restricted to a single vendor’s implementations. Many processors that rely upon speculation to improve performance are affected, even some that do not use out-of-order execution.

阅读更多

SiFive - January 03, 2018

A Look Back: 7th RISC-V Workshop

A new year brings new opportunities. Before we dive into 2018, we wanted to take some time to reflect on some of the excitement we experienced over the last couple of months.

阅读更多