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The traditional cadence for microarchitecture updates is usually tied to process technology nodes or ground-up redesigns. The SiFive Core IP portfolio offers scalable microarchitectures from efficient application multi-core processors capable of running Linux, to tiny, power-sipping cores suitable f...

As we make our way around the world meeting and engaging with others in the semiconductor and hardware design community, we are seeing an increased interest in RISC-V based hardware innovation. This is due in large part to the emergence of market-ready RISC-V core IP, development tools and silicon ...

Ever since we launched Freedom Studio in 2017, it has been a great way to quickly and easily get started writing code for SiFive platforms, whether those platforms are development boards such as the HiFive1 Rev B, Digilent Arty FPGA, or even our testbench, which ships along with SiFive IP deliverab...

HiFive1 Rev B: The Second Generation HiFive1 Dev Board and the Freedom Everywhere SoC, FE310 When SiFive launched the FE310 and HiFive1 in 2016, the product received a very warm and enthusiastic reception. The project received much more attention and traction than we could have ever hoped for. We we...

SiFive held a RISC-V Technology Symposium on February 26 at the Computer History Museum in Mountain View. Keith Witek, SiFive SVP Corporate Development and Strategy kicked off the event and introduced the first keynote speaker Martin Fink, Western Digital CTO, at the time acting CEO of the RISC-V Fo...

Published by SemiWiki. These were the closing words Yunsup Lee, CTO, SiFive used at one of the December RISC-V Summit Keynotes entitled ‘Opportunities and Challenges of Building Silicon in the Cloud’. Fired up was more the mood among the 1000+ attendees of the RISC-V Summit held at the Santa Clara C...