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Part 1: Fast Access to Accelerators: Enabling Optimized Data Transfer with RISC-V

Part 1: Fast Access to Accelerators: Enabling Optimized Data Transfer with RISC-V

Jan 13, 2020
This is the first in a series of blogs about Domain-specific accelerators (DSAs), which are becoming increasingly common in systems-on-chip (SoCs). A DSA provides higher performance per watt than a general-purpose processor by optimizing the specialized function it implements. Examples of DSAs inclu...
Our SiFive Tech Symposiums in Pakistan Drew Over 2,500 Attendees!

Our SiFive Tech Symposiums in Pakistan Drew Over 2,500 Attendees!

Nov 14, 2019
SiFive’s Tech Symposiums in Pakistan were a huge success, with the participation of more than 2,500 people from across the country. One of the symposiums was held at the NED University of Engineering and Technology in Karachi, and the other took place at the University of Engineering and Technology ...
Incredibly Scalable High-Performance RISC-V Core IP

Incredibly Scalable High-Performance RISC-V Core IP

Oct 24, 2019
Introducing the new SiFive U8-Series Core IP SiFive is pleased to introduce the SiFive U8-Series Core IP, an incredibly scalable high-performance microarchitecture for modern SoC designs. The SiFive U8-Series is the highest performance RISC-V ISA based Core IP available today, based on a superscal...
SiFive Shield: An Open, Scalable Platform Architecture for Security

SiFive Shield: An Open, Scalable Platform Architecture for Security

Oct 23, 2019
Securing The RISC-V Revolution SiFive Shield is an open, scalable platform architecture designed to enable whole SoC security for RISC-V designs. The needs of modern SoC design dictate the need for a scalable solution for security, offering a low trusted computing base with clear root-of-trust and ...
Making It Easy To Get It Right

Making It Easy To Get It Right

Sep 26, 2019
Today, SiFive is excited to announce the general availability of the Q3 2019 Engineering Update, packed with new features, tools, and improvements. In the first SiFive quarterly update, we discussed the transition from the “Information Age” to the “Experience Age.” In the Q3 Engineering Update, SiFi...
Supporting A World Leading RISC-V IP Portfolio

Supporting A World Leading RISC-V IP Portfolio

Sep 17, 2019
The second SiFive quarterly engineering release has arrived, and includes some great new Trace & Debug features. Static source code analysis may not offer a complete view of real world operation. Real time analysis enabled via tracing permits a deeper insight into the interactions of software an...