SiFive 21G1 Release Webinar
Enhancements to SiFive’s RISC-V IP Portfolio in the 21G1 Release
Join us in this webinar to learn about all of the enhancements to the SiFive™ RISC-V IP portfolio introduced in the 21G1 release. Product manager Graham Wilson will dive deep into the product updates, ranging from the ultra-capable SiFive U Series to the extremely popular SiFive E Series, offering up to 35% more performance for bit processing algorithms; and up to 25% smaller code size.
11:00 am - 12:00 pm PST / 2:00 pm - 3:00 pm EST
Graham WilsonDirector, SiFive Core IP Product Management
Graham has worked in the Semiconductor industry for over 25 years in various engineering and Processor IP Marketing roles. At SiFive, Graham is part of the Processor IP Product team, involved in whatever makes our customers successful with their SoC's using SiFive RISC-V processors.
The SiFive 21G1 release offers new advanced computation capability with bit manipulation packages, half precision floating point, as well as code size reduction by up to 25%. SoC integration in terms of hardware and software has been optimized for more efficient computation, smaller size and faster time to market.
By using SiFive’s latest release of Core IP, defining and adopting a high-performance, high-efficiency, secure RISC-V processor for your next application or real-time SoC has never been more attractive. Save time and effort with SiFive’s unique support for Arm CoreSight to minimize workflow disruption, and broad tool ecosystem support for SiFive Insight Advanced Trace and Debug.
Learn more at our blog post here: SiFive Core IP 21G1
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