资源与支持

SiFive 新闻中心

August 17, 2023

MEDIA ALERT: SIFIVE’S LEADERSHIP TO KEYNOTE AT THE RISC-V SUMMIT CHINA 2023

WHAT: SiFive will be onsite at the RISC-V Summit China, scheduled for Aug. 23 – 25, 2023 in Beijing. Hosted in partnership with RISC-V International and the Beijing Institute of Open Source Chip (BOSC), SiFive will deliver two keynotes on the future of RISC-V and the latest on SiFive’s high-performance RISC-V processors. SiFive will also host a series of technical sessions focused on RISC-V vectors, ML compilers, hibernation, and more.

At the event, SiFive experts can speak to the company’s broad Core IP portfolio, spanning from high-performance application processors to area-optimized, low-power embedded 64- and 32-bit microcontrollers, to vector processors designed for modern compute requirements and artificial intelligence (AI), and optimized for the specific needs of the automotive industry.

At RISC-V Summit China, global innovators will share technical and business innovation around RISC-V. The summit features a multi-track conference, tutorials, exhibitions and poster sessions. There will be real-time Chinese to English translations for in-person and virtual attendees.

In-person and virtual attendees are encouraged to check out SiFive’s speaking sessions:

Wednesday, 23 August: • 15:20: KEYNOTE: The RISC-V Future is Unlimited: China’s Role with Yunsup Lee • 17:00: KEYNOTE: It Just Keeps Getting Better: RISC-V Processor Performance with Jack Kang

Friday, 25 August: • 09:50: The Story of Getting RISC-V Vector in Linux with Andy Chiu and Zong Li • 14:10: Discovering the RVV C Intrinsics v1.0 with Eop Chen and Kito Cheng • 14:30: Software Components and Methodology for Designing and Optimizing RISC-V ML Compilers – A 3-Year Lesson of Collaboration With OpenXLA with Hong-Rong Hsu and Pen Li • 16:40: Accelerating the Migration from Arm Neon to RISC-V Vectors with Han-Kuan Chen

WHO: SiFive

WHEN: August 23-25, 2023 09:00 - 18:00 CST (23 August 2023) 09:00 – 19:10 CST (24-25 August 2023)

WHERE: RISC-V Summit China Shangri-La Hotel Beijing Beijing

Registration for the in-person and virtual event is open, register today.

About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms have enabled leading technology companies around the world to innovate, optimize and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. With SiFive, the future of RISC-V has no limits.

Follow live news and updates from the show floor with the #RISCVSummitChina hashtag on X and LinkedIn.

Read more SiFive news

SiFive 与 AMD 展开合作,优化基于 RISC-V 数据中心服务器的 AMD ROCm
新闻中心
SiFive 与 AMD 展开合作,优化基于 RISC-V 数据中心服务器的 AMD ROCm
本次合作融合了开源软件、AMD ROCm 生态系统的优势以及 RISC-V 开放标准架构的最佳特性,共同赋能下一代数据中心 AI 计算。两家公司将继续评估基于 RISC-V 架构服务器的 ROCm 优化方案,旨在提升处理速度,并在未来支持更多加速应用场景及更大规模的模型。
SiFive 推出 BigSky 开发服务器,加速 RISC-V 挺进数据中心
新闻中心
SiFive 推出 BigSky 开发服务器,加速 RISC-V 挺进数据中心
全新开发平台 SiFive BigSky 搭载 SiFive 最新 RISC-V CPU 技术,可帮助超大规模客户及生态系统合作伙伴开展软件移植、工作负载调优与验证测试等实操工作。
SiFive 推出第三代 Performance P550 与 P570 IP,树立 RISC-V 高性能新标杆
新闻中心
SiFive 推出第三代 Performance P550 与 P570 IP,树立 RISC-V 高性能新标杆
RISC-V 的黄金标准 SiFive, Inc. 今日宣布推出 SiFive Performance™ P570 Gen 3。这是其同类产品中功能最强大、效率最高的乱序执行处理器内核。P570 Gen 3 专为高要求的边缘 AI、高端消费电子及商用物联网应用打造。与广受欢迎的第一代 P550 相比,P570 Gen 3 的性能有着巨大的提升,并提供最新的 RVA23 ISA profile 支持。