SiFive Fosters RISC-V Collaboration and Education in India and Bangladesh Via Symposiums, Tutorials and Workshops

Last year we hosted several SiFive Tech Symposiums in India to help promulgate the RISC-V ecosystem in the region. The enthusiastic reception from those in industry as well as students and faculty at India's most esteemed universities was inspiring. This July and August, we're bringing the SiFive Tech Symposium back to India, and also visiting Bangladesh. Our goal remains to foster the RISC-V ecosystem and to help prepare university students for entry into a workforce where RISC-V is heavily utilized. We have industry-centric symposiums planned in New Delhi/Noida, Pune, Bangalore and Hyderabad; and university-centric tutorials and workshops planned for Chennai, and Dhaka in Bangladesh. Attendance at all events is free, but registration is required. Here is a glimpse of what's happening in each city.

New Delhi/Noida Symposium – Monday, July 29

With Western Digital as our co-host, this event will feature presentations by Krste Asanovic, chairman of the RISC-V Foundation and co-founder and chief architect at SiFive; Western Digital; Ministry of Electronics & Information Technology, government of India; Silicon Catalyst; CircuitSutra Technologies;Computer Science and Engineering Department at IIT Delhi; and many more. There will also be a tutorial on SiFive's Core Designer, which will demonstrate the ease and speed at which a customized CPU core can be built.

Pune Symposium – Wednesday, July 31

With Western Digital as our co-host, this event will feature presentations by Krste Asanovic, chairman of the RISC-V Foundation and co-founder and chief architect at SiFive; Western Digital; Hardware Design Group at the Center for Development of Advanced Computing (C-DAC, India); Silicon Catalyst; IoTIoT.in; and many more. There will also be a tutorial on SiFive's Core Designer, which will demonstrate the ease and speed at which a customized CPU core can be built.

Bangalore Symposium – Thursday, August 1

With Microchip and Western Digital as our co-hosts, this event will feature presentations by Krste Asanovic, chairman of the RISC-V Foundation and co-founder and chief architect at SiFive; Microchip; Western Digital; QuickLogic; Silicon Catalyst; Morphing Machines; and many more. There will also be a tutorial on SiFive's Core Designer, which will demonstrate the ease and speed at which a customized CPU core can be built.

Chennai Tutorial/Workshop – Saturday, August 3

With IIT Madras as our co-host, this academic-centric event will feature a presentation by Krste Asanovic, chairman of the board of the RISC-V Foundation and co-founder and chief architect at SiFive, and other industry veterans. There will be a tutorial on RISC-V cores and software, and a hands-on workshop where attendees will configure their own custom RISC-V core. This event presents a unique opportunity to network with RISC-V luminaries and solution providers.

Hyderabad Symposium – Monday, August 5

With Western Digital as our co-host, this event will feature presentations by Western Digital; SRiX; CircuitSutra Technologies; and many more. There will also be a tutorial on SiFive's Core Designer, which will demonstrate the ease and speed at which a customized CPU core can be built.

Dhaka, Bangladesh Tutorial/Workshop – Aug 26

With the University of Dhaka and Ulkasemi as our co-hosts, this academic-centric event will feature presentations by executives at SiFive, a talk by a faculty member at the University of Dhaka, a tutorial on RISC-V cores and software, and a hands-on workshop where attendees will configure their own custom RISC-V core. This event presents a unique opportunity to network with RISC-V luminaries and solution providers.

We look forward to seeing you!