资源与支持

SiFive 博客

来自 RISC-V 专家的最新洞察与深度技术解析

April 17, 2018

Dover Microsystems Brings Real-Time Chip Security to SiFive’s DesignShare

Boy have we been busy. Over the last few months, our DesignShare ecosystem has continued to expand, and, this week, we were excited to welcome Dover Microsystems into the program.

Through DesignShare, developers now have access to Dover Microsystems’ CoreGuard Silicon IP, which enables processors to defend themselves in real-time from all network-based attacks. CoreGuard prevents illegal instructions from executing before any damage can be done. Its security rules define the difference between legal and illegal instructions, and can be customized to meet the needs of a wide variety of systems.

Since we launched DesignShare in August, we’ve added several silicon and hardware IP to the DesignShare economy. Today, system designers can find and access the following technologies:

  • Cryptography technology by Rambus
  • Embedded analytics IP by UltraSoC
  • Embedded FPGA IP by Flex Logix
  • Embedded memory by eMemory
  • Precision PLL and SERDES IP by Analog Bits
  • Low-power GPU IP by Think Silicon
  • USB 3.1 IP by Corigine
  • Serial interconnect IP blocks by Mobiveil
  • And now, CoreGuard Silicon IP by Dover Microsystems

Each company participating in DesignShare shares SiFive’s passion for and vision to lower the barriers to entry that traditionally have blocked users from developing custom silicon. We’re excited to bring our visions together to lead the revolution of open source hardware.

Are you interested in being a part of the revolution? Let’s talk!

Learn more about Dover Microsystems’ participation in DesignShare.

Shafy Eltoukhy
Shafy Eltoukhy
SVP & General Manager, OpenFive

Read more Insights from the RISC-V Experts

为您介绍 SKL:SiFive 算子库
最新文章
为您介绍 SKL:SiFive 算子库
我们非常高兴地宣布推出 SiFive 算子库(SiFive Kernel Library,简称 SKL,发音为 “skill”)。这是一个开源的高性能计算例程集合,专为 RISC-V Vector ISA (RVV) 及其各种扩展(包括 SiFive 的矩阵引擎)进行了深度优化。
RISC-V EU Summit 2026: An Ecosystem Coming of Age
最新文章
RISC-V EU Summit 2026: An Ecosystem Coming of Age
I recently returned from the RISC-V Europe Summit 2026 in Bologna and, like many attendees, I came away energized by the announcements, the technical discussions and the sheer number of people building products around RISC-V.
P570 Gen 3:系统视角
最新文章
P570 Gen 3:系统视角
然而,CPU 的需求横跨性能、功耗和成本等多个维度。在某些细分市场中,需要在不同的功耗与成本约束下实现性能提升。基于这类 CPU 的系统需要可信赖的产品路线图,才能切实交付新的系统能力。尽管部分供应商已退出“低端市场”,SiFive 仍坚持在整条性能曲线上持续创新。本次发布的 P570 Gen 3 Performance IP,旨在为中低端、具备 Linux 能力的系统提供显著的性价比与能效比提升。