资源与支持

SiFive 博客

来自 RISC-V 专家的最新洞察与深度技术解析

May 08, 2018

Intel Capital Investment Boosts Vision for the Future

We’re very happy to announce that Intel Capital participated in our recent Series C funding round. The investment was revealed at the Intel Capital Global Summit earlier today.

Now, you may be thinking, “$50.6 million provides immense potential for SiFive – so now what?” For those of you who aren’t familiar with what SiFive is all about, we aim to leverage the body of software and tools available from the open-source community under the guidance of the RISC-V Foundation with the intention of dramatically reducing the costs of developing custom silicon.

On the core side, SiFive has a comprehensive roadmap of RISC-V CPU IP. We provide our customers with a comprehensive roadmap of silicon-proven CPU IP cores spanning the range from microcontrollers, to high-performance embedded cores, all the way to multi-core Linux capable applications. The difference SiFive makes lies in how comprehensive our solutions are, leadership in silicon proof points, and full customization capabilities—from custom instructions to tweaking the microarchitecture. With this funding, we aim to continue investing in our world-class roadmap and leverage our silicon capabilities to continue to lead the ecosystem development.

For system companies looking to build chips, the major barrier has been cost. The average cost of prototyping a 28-nanometer chip is around $7 million. We aim to cut costs by 90 percent, charging less than a million dollars for companies to get custom ASIC chips.

Our goal is to get silicon in the hands of designers as quickly as possible. Let them take a test drive to run benchmarks and discover where the chip works well for an intended purpose, and then form a plan for when and how to move it into full-scale production. We strive for this process to support all types of companies, including startups who otherwise would have to design products around off-the-shelf silicon.

With our recent funding, growing team and ongoing support from our existing investors Sutter Hill Ventures, Spark Capital and Osage University Partners, as well as new investors Chengwei Capital, Huami, SK Telecom, Western Digital and Intel Capital, we aim to make this all possible and continue spearheading the RISC-V revolution.

Interested in being part of the revolution? We’d love to chat!

Naveed Sherwani
Naveed Sherwani
Chief Executive Officer at SiFive

Read more Insights from the RISC-V Experts

SiFive 视角:RISC-V SPMP 规范正式批准,助力嵌入式安全飞跃发展
最新文章
SiFive 视角:RISC-V SPMP 规范正式批准,助力嵌入式安全飞跃发展
这项最新批准的 SPMP 功能专为增强运行实时操作系统(RTOS)的嵌入式系统中的内存保护而设计。SiFive 非常高兴能在这一进程中贡献力量,并将继续与整个生态系统保持合作,以完善 RISC-V 标准。我们坚信,SPMP 将在整个行业内获得快速普及。
为您介绍 SKL:SiFive 算子库
最新文章
为您介绍 SKL:SiFive 算子库
我们非常高兴地宣布推出 SiFive 算子库(SiFive Kernel Library,简称 SKL,发音为 “skill”)。这是一个开源的高性能计算例程集合,专为 RISC-V Vector ISA (RVV) 及其各种扩展(包括 SiFive 的矩阵引擎)进行了深度优化。
RISC-V EU Summit 2026: An Ecosystem Coming of Age
最新文章
RISC-V EU Summit 2026: An Ecosystem Coming of Age
I recently returned from the RISC-V Europe Summit 2026 in Bologna and, like many attendees, I came away energized by the announcements, the technical discussions and the sheer number of people building products around RISC-V.